ATA5428.pdf

Features

• Multi Channel Half-duplex Transceiver with Approximately ±2.5 MHz Programmable

Tuning Range

• High FSK Sensitivity: –106 dBm at 20 Kbit/s/–109.5 dBm at 2.4 Kbit/s (433.92 MHz)

• High ASK Sensitivity: –112.5 dBm at 10 Kbit/s/–116.5 dBm at 2.4 Kbit/s (433.92 MHz)

• Low Supply Current: 10.5 mA in RX and TX Mode (3V/TX with 5 dBm)

• Data Rate: 1 to 20 Kbit/s Manchester FSK, 1 to 10 Kbit/s Manchester ASK

• ASK/FSK Receiver Uses a Low-IF Architecture with High Selectivity, Blocking, and Low

Intermodulation (Typical Blocking 55 dB at ±750 kHz/61 dB at ±1.5 MHz and

70 dB at ±10 MHz, System I1dBCP = –30 dBm/System IIP3 = –20 dBm)

• 226 kHz/237 kHz IF Frequency with 30 dB Image Rejection and 170 kHz Usable IF

Bandwidth

• Transmitter Uses Closed Loop Fractional-N Synthesizer for FSK Modulation with a

High PLL Bandwidth and an Excellent Isolation between PLL/VCO and PA

• Tolerances of XTAL Compensated by Fractional-N Synthesizer with 800 Hz RF

Resolution

• Integrated RX/TX-Switch, Single-ended RF Input and Output

• RSSI (Received Signal Strength Indicator)

• Communication to Microcontroller with SPI Interface Working at Maximum 500 kBit/s

• Configurable Self Polling and RX/TX Protocol Handling with FIFO-RAM Buffering of

Received and Transmitted Data

• 5 Push Button Inputs and One Wake-up Input are Active in Power-down Mode

• Integrated XTAL Capacitors

• PA Efficiency: up to 38% (433.92 MHz/10 dBm/3V)

• Low In-band Sensitivity Change of Typically ±1.8 dB within ±58 kHz Center Frequency

Change in the Complete Temperature and Supply Voltage Range

• Supply Voltage Switch, Supply Voltage Regulator, Reset Generation, Clock/Interrupt

Generation and Low Battery Indicator for Microcontroller

• Fully Integrated PLL with Low Phase Noise VCO, PLL Loop Filter and Full Support of

Multi-channel Operation with Arbitrary Channel Distance Due to Fractional-N

Synthesizer

• Sophisticated Threshold Control and Quasi-peak Detector Circuit in the Data Slicer

• Power Management via Different Operation Modes

• 315 MHz, 345 MHz, 433.92 MHz, 868.3 MHz and 915 MHz without External VCO and PLL

Components

• Inductive Supply with Voltage Regulator if Battery is Empty (AUX Mode)

• Efficient XTO Start-up Circuit (> –1.5 k Ω Worst Case Real Start-up Impedance)

• Changing of Modulation Type ASK/FSK and Data Rate without Component Changes

• Minimal External Circuitry Requirements for Complete System Solution

• Adjustable Output Power: 0 to 10 dBm Adjusted and Stabilized with External Resistor

• ESD Protection at all Pins (1.5 kV HBM, 200V MM, 1 kV FCDM)

• Supply Voltage Range: 2.4V to 3.6V or 4.4V to 6.6V

• Temperature Range: –40°C to +85°C

• Small 7 × 7 mm QFN48 Package

UHF ASK/FSK

Transceiver

ATA5423

ATA5425

ATA5428

ATA5429

4841D–WIRE–10/07

Applications

• Consumer Industrial Segment

• Access Control Systems

• Remote Control Systems

• Alarm and Telemetry Systems

• Energy Metering

• Home Automation

Benefits

• Low System Cost Due to Very High System Integration Level

• Only One Crystal Needed in System

• Less Demanding Specification for the Microcontroller Due to Handling of Power-down Mode,

Delivering of Clock, Reset, Low Battery Indication and Complete Handling of Receive/Transmit

Protocol and Polling

• Single-ended Design with High Isolation of PLL/VCO from PA and the Power Supply Allows a

Loop Antenna in the Remote Control Unit to Surround the Whole Application

ATA5423/ATA5425/ATA5428/ATA5429

4841D–WIRE–10/07

ATA5423/ATA5425/ATA5428/ATA5429

1. General Description

The ATA5423/25/28/29 is a highly integrated UHF ASK/FSK multi-channel half-duplex trans-

ceiver with low power consumption supplied in a small 7 x 7 mm QFN48 package. The receive

part is built as a fully integrated low-IF receiver, whereas direct PLL modulation with the frac-

tional-N synthesizer is used for FSK transmission and switching of the power amplifier for ASK

transmission.

The device supports data rates of 1 Kbit/s to 20 Kbit/s (FSK) and 1 Kbit/s to 10 Kbit/s (ASK) in

Manchester, Bi-phase and other codes in transparent mode. The ATA5428 can be used in the

431.5 MHz to 436.5 MHz and in the 862 MHz to 872 MHz bands, the ATA5423 in the 312.5 MHz

to 317.5 MHz band, the ATA5425 in the 342.5 MHz to 347.5 MHz band and the ATA5429 in the

912.5 MHz to 917.5 MHz band. The very high system integration level results in a small number

of external components needed.

Due to its blocking and selectivity performance, together with the additional 15 dB to 20 dB loss

and the narrow bandwidth of a typical loop antenna in a remote control unit, a bulky blocking

SAW is not needed in the remote control unit. Additionally, the building blocks needed for a typi-

cal remote control and access control system on both sides (the base and the mobile stations)

are fully integrated.

Its digital control logic with self-polling and protocol generation enables a fast challenge-

response system without using a high-performance microcontroller. Therefore, the

ATA5423/ATA5425/ATA5428/ATA5429 contains a FIFO buffer RAM and can compose and

receive the physical messages themselves. This provides more time for the microcontroller to

carry out other functions such as calculating crypto algorithms, composing the logical messages,

and controlling other devices. Therefore, a standard 4-/8-bit microcontroller without special

periphery and clocked with the CLK output of about 4.5 MHz is sufficient to control the communi-

cation link. This is especially valid for passive entry and access control systems, where within

less than 100 ms several challenge-response communications with arbitration of the communi-

cation partner have to be handled.

It is hence possible to design bi-directional remote control and access control systems with a

fast challenge-response crypto function, with the same PCB board size and with the same cur-

rent consumption as uni-directional remote control systems.

4841D–WIRE–10/07

Figure 1-1. System Block Diagram

ATA5423/ATA5425/ATA5428/ATA5429

RF Transceiver

Digital Control

Logic

Power

Supply

Antenna

ATmega

44/88/168

Matching/

RF Switch

Microcontroller

interface

4 to 8

XTO

Figure 1-2. Pinning QFN48

47 46 45 44

41 40

38 37

RSSI

DEM_OUT

RF_IN

433_N868

SCK

SDI_TMDI

SDO_TMDO

ATA5423/ATA5425

ATA5428/ATA5429

CLK

R_PWR

IRQ

PWR_H

N_RESET

RF_OUT

VSINT

NC 12

XTAL2

15 16 17

20 21

23 24

ATA5423/ATA5425/ATA5428/ATA5429

4841D–WIRE–10/07

ATA5423/ATA5425/ATA5428/ATA5429

Table 1-1.

Pin Description

Symbol

Function

Not connected

RF_IN

RF input

Not connected

433_N868

Selects RF input/output frequency range

Not connected

R_PWR

Resistor to adjust output power

PWR_H

Pin to select output power

RF_OUT

RF output

Not connected

AVCC

Blocking of the analog voltage supply

VS2

Power supply input for voltage range 4.4V to 6.6V

VS1

Power supply input for voltage range 2.4V to 3.6V

VAUX

Auxiliary supply voltage input

TEST1

Test input, at GND during operation

DVCC

Blocking of the digital voltage supply

VSOUT

Output voltage power supply for external devices

TEST2

Test input, at GND during operation

XTAL1

Reference crystal

XTAL2

Reference crystal

Not connected

VSINT

Microcontroller interface supply voltage

N_RESET

Output pin to reset a connected microcontroller

IRQ

Interrupt request

CLK

Clock output to connect a microcontroller

SDO_TMDO

Serial data out/transparent mode data out

SDI_TMDI

Serial data in/transparent mode data in

SCK

Serial clock

DEM_OUT

Demodulator open drain output signal

Chip select for serial interface

RSSI

Output of the RSSI amplifier

CDEM

Capacitor to adjust the lower cut - off frequency data filter

RX_TX2

GND pin to decouple LNA in TX mode

RX_TX1

Switch pin to decouple LNA in TX mode

PWR_ON

Input to switch on the system (active high)

Key input 5 (can also be used to switch on the system (active low))

4841D–WIRE–10/07

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