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DM74LS574 Octal D Flip-Flop with TRI-STATE(RM) Outputs
February 1992
DM74LS574
Octal D Flip-Flop with TRI-STATE
É
Outputs
General Description
The 'LS574 is a high speed low power octal flip-flop with a
buffered co
mm
on Clock (CP) and a buffered common Out-
put Enable (OE). The information presented to the D inputs
is stored in the flip-flops on the LOW-to-HIGH Clock (CP)
transition.
This device is functionally identical to the 'LS374 except for
the pinouts.
Connection Diagram
Logic Symbol
Dual-In-Line Package
TL/F/9815±2
V
CC
e
Pin 20
GND
e
Pin 10
TL/F/9815±1
Order Number DM74LS574WM or DM74LS574N
See NS Package Number M20B or N20A
TRI-STATE
É
is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
TL/F/9815
RRD-B30M115/Printed in U. S. A.
Absolute Maximum Ratings
(Note)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
7V
Note: The ``AbsoluteMaximumRatings'' are those values
beyondwhich the safety of thedevice cannot be guaran-
teed.Thedeviceshouldnotbeoperatedattheselimits.The
parametricvaluesdefinedinthe``ElectricalCharacteristics''
tablearenotguaranteedattheabsolutemaximumratings.
The``RecommendedOperatingConditions''tablewilldefine
theconditionsforactualdeviceoperation.
Input Voltage
7V
Operating Free Air Temperature Range
DM74LS
0
§
Cto
a
70
§
C
Storage Temperature Range
b
65
§
Cto
a
150
§
C
Recommended Operating Conditions
Symbol
Parameter
DM74LS574
Units
Min
Nom
Max
V
CC
Supply Voltage
4.75
5
5.25
V
V
IH
High Level Input Voltage
2
V
V
IL
Low Level Input Voltage
0.8
V
I
OH
High Level Output Current
b
2.6
mA
I
OL
Low Level Output Current
24
mA
T
A
Free Air Operating Temperature
0
70
§
C
t
s
(H)
Setup Time HIGH or LOW
20
ns
t
s
(L)
Dn to CP
20
t
h
(H)
Hold Time HIGH or LOW
0
ns
t
h
(L)
Dn to CP
0
t
w
(H)
CP Pulse Width
15
ns
t
w
(L)
HIGH or LOW
15
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 1)
V
I
Input Clamp Voltage
V
CC
e
Min, I
I
eb
18 mA
b
1.5
V
V
OH
High Level Output
V
CC
e
Min, I
OH
e
Max,
2.4
3.3
V
Voltage
V
IL
e
Max, V
IH
e
Min
V
OL
Low Level Output
V
CC
e
Min, I
OL
e
Max,
0.35
0.5
Voltage
V
IL
e
Max, V
IH
e
Min
V
I
OL
e
12 mA, V
CC
e
Min
0.25
0.4
I
I
Input Current
@
Max
V
CC
e
Max, V
I
e
7V
0.1
mA
Input Voltage
I
IH
High Level Input Current
V
CC
e
Max, V
I
e
2.7V
20
m
A
I
IL
Low Level Input Current
V
CC
e
Max, V
I
e
0.4V
b
400
m
A
I
OZH
Off-State Output Current
V
CC
e
Max, V
O
e
2.4V
with High Level Output
V
IH
e
Min, V
IL
e
Max
20
m
A
Voltage Applied
I
OZL
Off-State Output Current
V
CC
e
Max, V
O
e
0.4V
with Low Level Output
V
IH
e
Min, V
IL
e
Max
b
20
m
A
Voltage Applied
2
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted) (Continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 1)
I
OS
Short Circuit (Note 2)
V
CC
e
Max
b
30
b
130
mA
Output Current
I
CC
Supply Current
V
CC
e
Max (Note 3)
45
mA
Note 1: All typicals are at V
CC
e
5V, T
A
e
25
§
C.
Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 3: I
CC
is measured with the DATA inputs grounded and the OUTPUT CONTROLS at 4.5V.
Switching Characteristics
V
CC
ea
5.0V, T
A
ea
25
§
C
R
L
e
2k
X
,
Symbol
Parameter
C
L
e
45 pF
Units
Min
Max
f
max
Maximum Clock Frequency
35
MHz
t
PLH
Propagation Delay
28
ns
t
PHL
CP to On
28
t
PZH
Output Enable Time
28
ns
t
PZL
28
t
PHZ
Output Disable Time
20
ns
t
PLZ
25
Functional Description
The LS574 consists of eight edge-triggered flip-flops with
individual D-type inputs and TRI-STATE true outputs. The
buffered clock and buffered Outputs Enable are common to
all flip-flops. The eight flip-flops will store the state of their
individual D inputs that meet the setup and hold times re-
quirements on the L
O
W-to-HIGH Clock (CP) transition. With
the Output Enable (OE) LOW, the contents
of
the eight flip-
flops are available at the outputs. When the OE is HIGH, the
out
puts go to the high impedence state. Operation of the
OE input does not affect the state of the flip-flops.
Truth Table
Inputs
Outputs
Dn
CP
OE
On
H
L
L
H
L
L
L
L
X
X
H
Z
H
e
HIGH Voltage Level
L
e
LOW Voltage Level
X
e
Immaterial
Z
e
High Impedance
Logic Diagram
TL/F/9815±3
3
4
Physical Dimensions
inches (millimeters)
20-Lead Wide Small Outline Molded Package (M)
Order Number DM74LS574WM
NS Package Number M20B
5
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