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design ideas
EditEd By Brad thompson
and Fran GranvillE
readerS SOLVe deSIGN PrOBLeMS
Current mirror improves
PWM regulator’s performance
D Is Inside
70 Low-cost current monitor
tracks high dc currents
74 Digital-I/O circuit adapts to
many interface voltages
E What are your design problems
and solutions? Publish them here
and receive $150! Send your
Design Ideas to edndesignideas@
reedbusiness.com.
Power-supply designs requiring
high-performance isolated feed-
back often use an error amplifier simi-
lar to the one in Figure 1 , which relies
on a second amplifier, IC 1B , to provide
the necessary inversion to keep the op-
tocoupler, IC 2 , referenced to ground.
To prevent bias-supply noise from en-
tering the feedback path and causing
oscillations, the amplifier relies on its
ground reference and power-supply-
rejection characteristics. The power
supply’s output drives a voltage divider
comprising R 1 and R 2 that maintains
the amplifier’s inverting input at the
same voltage as the reference voltage
that IC 3 provides. C 2 , R 3 , and C 3 com-
prise frequency-compensation com-
ponents for the power supply’s stable
operation. This component-intensive
error-amplifier configuration requires
two operational amplifiers, one preci-
sion shunt-voltage reference, four ca-
pacitors and often a fifth in parallel
with R 6 , and seven resistors.
Figure 2 shows an alternative sin-
gle-amplifier design in which IC 3 , an
LM4040 precision-voltage reference,
drives optocoupler IC 2 with a “stiff”
positive-voltage source over a wide
current range. The voltage reference
suppresses any noise present on the
bias-supply rail. Variations in the ref-
erence and power-supply voltages ap-
pear in common mode at the amplifi-
er’s inputs and thus provide addition-
al noise immunity. A resistive-voltage
divider comprising R 2 and R 3 reduc-
es the reference voltage to equal the
power supply’s regulated output volt-
age, which drives IC 1 ’s inverting input
through R 1 . Given its single voltage di-
vider, the error-amplifier circuit of Fig-
ure 2 provides the same output voltage
as the circuit of Figure 1 and requires
a single operational amplifier and pre-
cision shunt reference, four capacitors,
and six resistors.
Miller-effect coupling of collector-
emitter-voltage transitions into a typi-
cal phototransistor-based optocoupler’s
high-impedance, optically sensitive
V CC
R 4
C 2
IC 3
LM4040
2.5V
VOLTAGE
REFERENCE
R 3
C 3
R 6
FROM
POWER
SUPPLY’S
OUTPUT
C 1
0.1 �F
R 1
14
2
R 5
6
1
IC 1A
R 7
IC 2
1
7
3
IC 1B
4
+
5
R 2
+
7
TO REMAINDER
OF PWM POWER
SUPPLY
3
C 4
2
Figure 1 A conventional isolated-feedback circuit requires an extra operational amplifier and adds several passive compo-
nents to a representative pulse-width-modulated power-supply design.
march 1, 2007 | EDN 69
Grant smith, national semiconductor, phoenix, aZ
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design ideas
base region introduces a bandwidth-
limiting pole, which dramatically slows
the device’s response time. Holding
the phototransistor’s collector-emit-
ter voltage constant and allowing only
its collector-emitter current to change
provide an order-of-magnitude switch-
ing-speed improvement.
National Semiconductor’s (www.
national.com) LM5026 active-clamp
current-mode PWM controller, IC 4 ,
provides a convenient method of re-
ducing an optocoupler’s Miller-effect-
induced slowdown. Figure 2 shows the
LM5026’s internal current mirror driv-
ing what would normally serve as a fre-
quency-compensation pin. Optocou-
pler IC 2 connects directly between two
constant-voltage sources comprising
the current mirror and a voltage ref-
erence. The resultant decrease in re-
sponse time relocates the bandwidth-
limiting pole and improves the circuit’s
transient response.
The values of C 2 , C 3 , R 3 , and R 1 apply
only to this design and may require
modification for other applications.
Select R 1 to provide equal impedances
at both of the op amp’s inputs. C 2 forms
a high-frequency noise filter. After you
measure the converter’s overall gain,
calculate values for C 3 and R 3 that
will provide proper gain and phase re-
sponse. Several methods of calculation
are available, most of which will pro-
vide adequate results. EDN
V CC
R 5
499
IC 4
LM5026
R 6
1k
C 2
100 pF
IC 3
LM4040
4.1V
5V REF
R 4
10k
C 3
0.033 �F
C 4
1000 pF
IC 2
1
R 2
30.9k
5k
REF
4
C 1
0.1 �F
TO REMAINDER
OF PWM POWER
SUPPLY
FROM
POWER SUPPLY’S
OUTPUT
COMP
3
5
4
2
1
IC 1
LM8261
R 1
24.9k
3
+
PWM
COMPARATOR
2
R 3
127k
CURRENT
MIRROR
Figure 2 Clamping an optoisolator’s voltage excursion improves the PWM-regulator loop’s transient response.
Low-cost current
monitor tracks
high dc currents
susanne nell, Breitenfurt, austria
B
CORE REACHES
SATURATION
0.3
B(H)
MAGNETIC-
FLUX DENSITY
(TESLA)
0.2
PERMEABILITY
To measure high levels of direct
current for overload detection
and protection, designers frequently
use either a current-shunt resistor or a
toroidal core and Hall-effect magnetic-
field sensor. Both methods suffer from
drawbacks. For example, measuring
20A with a 10-m V resistor dissipates
4W of power as waste heat. The Hall-
effect sensor delivers accurate measure-
ments and wastes little power, but it’s
0.1
0
H
0
10
20
30
40
50
MAGNETIC-FIELD STRENGTH
(A/m)
Figure 1 This representative magnetization (BH) curve shows that, as current
through an inductor’s winding increases, so does magnetizing-field strength,
H. When magnetic-flux density, B, can no longer increase, the core’s magnetic
material has reached saturation.
70 EDN | march 1, 2007
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design ideas
an expensive approach to simple cur-
rent monitoring.
This Design Idea describes an inex-
pensive, low-power current-measure-
ment circuit that’s useful for measure-
ments of modest accuracy. As a bonus,
a filter inductor in a dc/dc converter’s
input line can double as a current sen-
sor for the measurement circuit. A rep-
resentative ferrite core’s permeability
decreases as the core nears saturation
( Figure 1 ). The curve’s shape and val-
ues depend on the core material’s char-
acteristics and whether the core in-
cludes an air gap.
The core’s permeability depends on
the magnetic-flux level in the ferrite
material, which in turn depends on
the amount of current flowing through
the core’s windings. This circuit uses
a simple LC oscillator to measure the
core’s permeability. A primary winding
J 4
CURREN T TO MEASURE
I DC
J 3
IN
OUT
L
PRIMARY: ONE TURN
T 1
SECONDARY: 50 TURNS
TOROID FERRITE CORE
5V
5V
J 2
R 2
47k
R 3
6.8k
C 4
100 nF
FREQUENCY
OUTPUT
POWER INPUT
Q 1
BC548
C 2
22 nF
5V
J 1
+
C 1
10 �F
10V
V CC
GND
R 1
15k
R 4
2.2k
C 3
47 nF
Figure 2 Varying the direct current flowing through the single-turn primary
winding alters T 1 ’s secondary winding’s inductance, which in turn varies the
oscillator’s output frequency.
a fILter INductOr
IN a dc/dc cON­
Verter’S INPut LINe
caN dOuBLe aS a
curreNt SeNSOr fOr
the MeaSureMeNt
cIrcuIt.
45
40
35
30
OUTPUT
FREQUENCY
(kHz)
25
SIEMENS
FONOX
VAKUUMSCHMELZE
20
15
comprising one or more turns wound
on the core carries the measurement
current. A multiturn secondary wind-
ing on the core forms an inductor, L,
that determines the oscillator’s reso-
nant frequency.
In theory, any LC oscillator circuit
will serve in this application, but, in
practice, the current-measurement
winding presents a low impedance that
damps the LC-tank circuit and causes
start-up and stability problems in some
oscillator circuits. Of a variety of test-
ed oscillator circuits, the design in Fig-
ure 2 offers the best performance. A
number of factors affect the core’s per-
meability, which in turn impacts the
circuit’s frequency stability and lim-
its its applications to current-overload
detection and low-accuracy current
measurements.
Figure 3 illustrates the circuit’s out-
10
5
0
0
1
2
3
4
5
6
7
8
9 10 11
DC PRIMARY CURRENT (A)
Figure 3 Current-versus-output-frequency plots for three manufacturers’ toroi-
dal cores show the influence of the cores’ characteristics on frequency linear-
ity and relative sensitivity.
put-frequency-versus-current charac-
teristics for three vendors’ ferrite cores
of identical dimensions and number of
secondary turns. For best linearity, use
a low-hysteresis core material. Cores of
virtually any dimensions and materials
work in the circuit but require optimi-
zation of the number of turns on the
oscillator tank and primary windings.
Increase the core’s air gap, if present,
when the current you apply to the core
causes saturation before reaching the
overload value. For improved perfor-
mance and linear measurements, use
the circuit in a closed-loop configura-
tion ( Reference 1 ). EDN
R e f e R e n c e
Nell, Susanne, “Improved current
monitor delivers proportional-voltage
output,” EDN , Jan 19, 2006, pg 84,
www.edn.com/article/CA6298271.
72 EDN | march 1, 2007
1
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design ideas
Digital-I/O circuit adapts
to many interface voltages
steve hageman, Windsor, Ca
To solve the problem, I designed a
flexible digital-interface circuit around
a MAX7301 I/O expander from Max-
im Integrated Products (www.maxim-
ic.com) and a programmable linear-
power supply comprising a MAX1658
adjustable linear-voltage regulator un-
der the control of a MAX5400 256-
position, digitally programmable po-
tentiometer. This circuit provides a
programmable interface matching the
logic levels of ICs that require 2.5, 3,
3.3, and 5V power supplies.
Two SPIs (serial-peripheral inter-
To test products in my R&D
lab, I build many universal data-
acquisition systems that connect to a
PC or another controller through RS-
232 links or LANs. These small sys-
tems typically include multiple ADC,
DAC, and digital-I/O channels to con-
trol various hardware functions during
product design and development. Over
the years, I have established a simpli-
fied analog-interface standard that
spans a 0 to 5V range. On the digital
side, many of the newer logic families
no longer tolerate 5V inputs and have
rendered 5V-only digital-I/O ports ob-
solescent.
ADJUSTABLE REGULATOR
DIGITAL-I/O VOLTAGE
TO Q 1 TO Q 6
3
4
5
1
2.5 TO 5V
5.25V
6
7
2
IC 3
MAX1658
GND
VOUT
+
C 1
10 �F
C 2
0.1 �F
VIN
C 3
0.1 �F
C 4
10 �F
SET
SD
8
5.25V
R 7
86.6k
R 1
4.7k
6
3
5
4
VCC
8
7
1
Q 1
SI1012R/X
D
CS
SCLK
DIN
IC 2
MAX5400
GND
H
W
L
256-POSITION,
50-k� TRIM
POTENTIOMETER
C 5
0.1 �F
CHIP SELECT
MAX5400
R 8
41.2k
2
S
5.25V
DIGITAL-I/O VOLTAGE
28
R 2
4.7k
R 4
4.7k
27
CS
SCLK
DIN
DOUT
VCC
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
P24
P25
P26
P27
P28
P29
P30
P31
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Q 4
SI1012R/X
Q 2
SI1012R/X
D
26
D
4
NC
SCLK
S
S
1
ISET
5.25V
DIGITAL-I/O
VOLTAGE
R 9
39k
20 PROGRAMMABLE
DIGITAL-I/O LINES
WITH VARIABLE
VOLTAGE SPANNING
2.5 TO 5V
IC 1
MAX7301AAI
R 3
4.7k
R 5
4.7k
Q 3
SI1012R/X
Q 5
SI1012R/X
D
D
DATA
TO
MICROPROCESSOR
CONTROLLER
1.8 TO 5V LOGIC
S
S
DIGITAL-I/O
VOLTAGE
CHIP SELECT
MAX7301
R 6
4.7k
GND
SCLK
D
2
3
DATA
Q 6
SI1012R/X
S
Figure 1 A programmable power supply sets voltage thresholds for a universal digital-I/O device.
74 EDN | march 1, 2007
+
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design ideas
faces) control all 20 of the MAX-
7301AAI’s input and output pins and
voltage thresholds ( Figure 1 ). Un-
like some SPI-port expanders that in-
clude weak, resistor-only pullups, the
MAX7301, IC 1 , features true, active-
pullup, “totem-pole” outputs that can
source higher currents. When powered
by the SPI-programmable linear regu-
lator, the MAX7301’s outputs can de-
liver logic levels of 2.5 to 5V. The pro-
gramming interfaces for both devices
comprise two three-wire (plus ground)
SPI connections that use only six of
the controller’s signal lines.
Six Vishay (www.vishay.com) Si-
1012R low-gate-voltage-threshold N-
channel MOSFETs, Q 1 through Q 6 ,
isolate the controllers’ fixed-output-
voltage levels from IC 1 ’s variable-in-
put-threshold voltages. Although any
of several IC-level-translator ICs work
equally well, the inexpensive MOSFET
buffers occupy small footprints on the
interface’s PCB (printed-circuit board).
For operation at serial-interface clock
uNLIke SOMe SPI­POrt
exPaNderS that
INcLude weak, reSIS­
tOr­ONLy PuLLuPS, the
Max7301, Ic 1 , featureS
true actIVe­PuLLuP,
“tOteM­POLe” OutPutS
that caN SOurce
hIGher curreNtS.
trols IC 3 , a Maxim MAX1658 adjust-
able-voltage linear regulator. Writing
all zeros to IC 2 sets IC 3 ’s output voltage
to slightly more than 5V, and writing
all ones (255 decimal) to IC 2 reduc-
es IC 3 ’s output voltage to slightly less
than 2.5V. To compensate for compo-
nent tolerances, the circuit provides
enough voltage overrange to cover the
full 2.5 to 5V range. Writing 128 (dec-
imal) to IC 2 should produce a nomi-
nal 3.25V output. Measure IC 3 ’s actual
output voltage and subtract it from the
nominal voltage to produce an offset
count for calibration correction.
In operation, the host controller sets
IC 3 ’s regulated output voltage through
IC 2 and determines the maximum volt-
ages of IC 1 ’s logic inputs and outputs.
Next, the controller configures IC 1 ’s in-
puts and outputs as necessary for the in-
terface task at hand. The MAX7301’s
standard CMOS logic-threshold voltag-
es of 0.3 to 0.7 times its supply voltage
for low and high inputs, respectively, in-
terface with other CMOS parts. EDN
rates approaching IC 1 ’s 26-MHz maxi-
mum, optimize the values of resistors
R 1 through R 6 to provide adequate rise
times at the selected clock rate. These
values are adequate for operation at the
1-MHz SPI clock rate that a low-power
microcontroller produces.
To alter the circuit’s output-volt-
age level, IC 2 , a 256-step Maxim
MAX5400 digital potentiometer, con-
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