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Power Management
Texas Instruments Incorporated
Compensating and measuring the control
loop of a high-power LED driver
By Jeff Falin
Senior Applications Engineer
A mathematical model is always helpful in determining the
optimal compensation components for a particular design.
However, compensating the loop of a WLED current-
regulating boost converter is a bit different than compen-
sating the same converter configured to regulate voltage.
Measuring the control loop with traditional methods is
cumbersome because of low impedance at the feedback
(FB) pin and the lack of a top-side FB resistor. In
Reference 1, Ray Ridley has presented a simplified,
small-signal control-loop model for a boost converter with
current-mode control. The following explains how to modify
Ridley’s model so that it fits a WLED current-regulating
boost converter; it also explains how to measure the boost
converter’s control loop.
Loop components
As shown in Figure 1, any adjustable DC/DC converter can
be modified to provide a higher or lower regulated output
voltage from an input voltage. In this configuration, if we
assume R OUT is a purely resistive load, then V OUT = I OUT ×
R OUT . When used to power LEDs, a DC/DC converter actu-
ally controls the current through the LEDs by regulating
the voltage across the low-side FB resistor as shown in
Figure 2. Because the load itself (the LEDs) replaces the
upper FB resistor, the traditional small-signal control-loop
equations no longer apply. The DC load resistance is
Figure 1. Adjustable DC/DC converter used to
regulate voltage
V OUT
V IN
V IN
V OUT
Adjustable
DC/DC
Converter
R OUT
V FB
GND
FB
Figure 2. Adjustable DC/DC converter used to
regulate current through LEDs
V OUT
V IN
V IN
V OUT
Adjustable
DC/DC
Converter
R EQ = V OUT /I LED ,
(1)
GND
FB
with
V FB
R SENSE
V OUT = n × V FWD + V FB .
(2)
V FWD , taken either from the diodes’ datasheet or from
measurements, is the forward voltage at I LED ; and n is the
number of LEDs in the string.
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High-Performance Analog Products
4Q 2008
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Texas Instruments Incorporated
Power Management
I LED for the application and compute the slope. For exam-
ple, using the dotted tangent line in Figure 3, we get r D =
(3.5 – 2.0 V)/(1.000 – 0.010 A) = 1.51 W at I LED = 350 mA.
Small-signal model
As an example of a small-signal model, the TPS61165 peak-
current-modeconverterdrivingthreeseriesOSRAMLW
W5SM parts will be used. Figure 4a shows an equivalent
small-signal model of a current-regulating boost converter,
while Figure 4b shows an even more simplified model.
Equation 3 shows a frequency-based (s-domain) model
for computing DC gain in both the current-regulating and
the voltage-regulating boost converters:
Figure 3. I-V curve of OSRAM LW W5SM
OHL02520
1000
T 25ºC
A =
350
100
s
× −
s
1
+
1
ω
ω
=× −
(
1
D
)
z
RHP
Gs K
()
×
,
(3)
P
R
R
2
2
s
i
× +
s
s
1
+
1
+
ω
Q
ω
ω
p
ppn
n
10
2.0
2.5
3.0
3.5
4.0
4.5
where the common variables are
Forward Voltage, V
(V)
FWD
1
ω z
=
,
ESRC
×
OUT
However, from a small-signal standpoint, the load resist-
ance consists of R EQ as well as the dynamic resistances of
the LEDs, r D , at the I LED . While some LED manufacturers
provide typical values of r D at various current levels, the
best way to determine r D is to extract it from the typical
LED I-V curve, which all manufacturers provide. Figure 3
showsanexampleI-VcurveofanOSRAMLWW5SMhigh-
power LED. Being a dynamic (or small-signal) quantity, r D
is defined as the change in voltage divided by the change in
current, or r D = ∆V FWD /∆I LED . To extract r D from Figure 3,
we simply drive a straight tangent line from the V FWD and
1
Q
=
,
p
S
S
e
n
π
1
+
(
1
−−
D
)
05
.
ωπ
n
=× ,
f
SW
and
R
DL
EQ
ω RHP
=
.
2
(
1
−×
)
Figure 4. Small-signal model of current-regulating boost converter
L
V OUT
V OUT
× r
n
D
V IN
× r
( 1–D )
R i
n
D
+
–
C OUT
D
R EQ
C OUT
–
R i
ESR
R SENSE
+
V REF
R SENSE
ESR
–
Σ
+
V REF
(a) Complete
(b) Simplified
15
Analog Applications Journal
4Q 2008
High-Performance Analog Products
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Power Management
Texas Instruments Incorporated
Table 1. Differences in Equation 3 terms for two converter models
EVALUATION OF
CURRENT-REGULATING
BOOST CONVERTER
EVALUATION OF
VOLTAGE-REGULATING
BOOST CONVERTER
TERM
R
1+ R+nr
R
EQ
R
OUT
×
K R
EQ
D
2
SENSE
1+ nr+R
R
×
D
ENSE
2
w p
EQ
(R
+ESR)
×
C
OUT
OUT
(n
×
r+R
+ ESR)
×
C
D ENSE
OUT
The duty cycle, D, and the modified values for V OUT and
R EQ are computed the same way for both circuits. S n and
S e are the natural inductor and compensation slopes,
respectively, for the boost converter; and f SW is the switch-
ing frequency. The only real differences between the small-
signal model for the voltage-regulating boost converter
and the model for a current-regulating boost converter is
the resistance K R —which multiplies by the transconduct-
ance term, (1 – D)/R i —and the dominant pole, w p . These
differences are summarized in Table 1. See Reference 1
for more information.
Since the value of R SENSE is typically much lower than
that of R OUT in a converter configured to regulate voltage,
the gain for a current-regulating converter, where R OUT =
R EQ , will almost always be lower than the gain for a voltage-
regulating converter.
Measuring the loop
To measure the control loop gain and phase of a voltage-
regulating converter, a network or dedicated loop-gain/
phase analyzer typically uses a 1:1 transformer to inject a
small signal into the loop via a small resistance (R INJ ). The
analyzer then measures and compares, over frequency, the
injected signal at point A to the returned signal at point R
and reports the ratio in terms of amplitude difference
(gain) and time delay (phase). This resistance can be
inserted anywhere in the loop as long as point A has rela-
tively much lower impedance than point R; otherwise, the
injected signal will be too large and disturb the converter’s
operating point. As shown in Figure 5, the high-impedance
node where the FB resistors sense the output voltage at
the output capacitor (low-impedance node) is the typical
place for such a resistor.
Figure 5. Control-loop measurement for voltage-
regulating converter
V OUT
Low Z
V IN
V OUT
A
1:1
Adjustable
DC/DC
Converter
Configured as
a Voltage
Regulator
C OUT
AC
Source
R INJ
R
High Z
Network or
Loop-Gain
Analyzer
k
GND
FB
k
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4Q 2008
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Texas Instruments Incorporated
Power Management
In a current-regulating configuration,
with the load itself being the upper FB
resistor, the injection resistor cannot
be inserted in series with the LEDs.
The converter’s operating point must
first be changed so the resistor can be
inserted between the FB pin and the
sense resistor as shown in Figure 6. In
some cases, a non-inverting, unity-gain
buffer amplifier may be necessary to
lower the impedance at the injection
point and reduce measurement noise.
With the measurement setup in
Figure 6 but without the amplifier, and
with R INJ = 51.1 W, a Venable loop ana-
lyzer was used to measure the loop.
The model of a current-regulating
converter was constructed in Mathcad ®
using the datasheet design parameters
of the TPS61170, which has the same
core as the TPS61165. With V IN = 5 V
and I LED set to 350 mA, the model gives
the predicted loop response for the
TPS61165EVM as shown in Figure 7,
which provides an easy comparison
with measured data.
We can easily explain the differences
between the measured and simulated
gain by observing variations in the
WLED dynamic resistance and using
the typical LED I-V curve as well as
chip-to-chip variations in the IC’s
amplifier gain.
Conclusion
While not exact, the mathematical
model gives the designer a good start-
ing point for designing the compensa-
tion of a WLED current-regulating
boost converter. In addition, the
designer can measure the control loop
with one of the alternate methods.
Reference
1. Ray Ridley. (2006). Designer’s
Series, Part V: Current-Mode
Control Modeling. Switching Power
Magazine [Online].Available: http://
Related Web sites
Figure 6. Control-loop measurement for current-
regulating converter
I LED
V IN
V OUT
Adjustable
DC/DC
Converter
Configured
as a Current
Regulator
C OUT
Optional
R
(50 to 100
INJ Ω
+
)
GND
FB
–
R SENSE
1:1
R
A
AC Source
Network or Loop-
Gain Analyzer
Figure 7. Measured and simulated loop gain and phase
at V IN = 5 V and I LED = 350 mA
30
180
Measured
Phase
20
120
10
60
Simulated
Phase
0
0
Measured
Gain
Simulated
Gain
–60
–10
–120
–20
–180
–30
100
1000
10000
100000
Frequency (Hz)
17
Analog Applications Journal
4Q 2008
High-Performance Analog Products
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